Analog Layout Engineer
About This Job
Modernize Chip Solutions (MCS)
Location: Hyderabad, Telangana, India
Work Mode: On-site
Industry: Semiconductor Manufacturing
Job Description
Hiring: Analog Layout Engineer | Hyderabad
Modernize Chip Solutions (MCS) is looking for experienced Analog Layout Engineers to join our semiconductor engineering team.
Location: Hyderabad
Experience: 4–6 Years
Notice Period: Immediate to 15 Days
Key Responsibilities & Requirements
Strong experience in Analog Layout with advanced technology nodes.Experience with TSMC 5nm, 3nm and below is preferred. Experience with Samsung/GlobalFoundries is also considered.Design and development of Analog, Mixed-Signal and Custom Digital blocks.Support full-chip level integration activities.Hands-on experience with analog blocks such as Regulators, Charge Pumps and Power Management.Ability to independently execute and deliver high-quality block-level layouts within timelines.Expertise in Cadence XL/EXL for layout execution.Strong knowledge of LVS, DRC, DFM, Antenna and EMIR verification flows.Mentor Graphics Calibre DRC/LVS experience is mandatory.HBM experience is a strong plus.BE/M.Tech in Electronics, VLSI or related engineering discipline.Good communication and collaboration skills.
Interested candidates can share their updated resume with [email protected]
Modernize Chip Solutions (MCS)
Location: Hyderabad, Telangana, India
Work Mode: On-site
Industry: Semiconductor Manufacturing
Job Description
Hiring: Analog Layout Engineer | Hyderabad
Modernize Chip Solutions (MCS) is looking for experienced Analog Layout Engineers to join our semiconductor engineering team.
Location: Hyderabad
Experience: 4–6 Years
Notice Period: Immediate to 15 Days
Key Responsibilities & Requirements
Strong experience in Analog Layout with advanced technology nodes.Experience with TSMC 5nm, 3nm and below is preferred. Experience with Samsung/GlobalFoundries is also considered.Design and development of Analog, Mixed-Signal and Custom Digital blocks.Support full-chip level integration activities.Hands-on experience with analog blocks such as Regulators, Charge Pumps and Power Management.Ability to independently execute and deliver high-quality block-level layouts within timelines.Expertise in Cadence XL/EXL for layout execution.Strong knowledge of LVS, DRC, DFM, Antenna and EMIR verification flows.Mentor Graphics Calibre DRC/LVS experience is mandatory.HBM experience is a strong plus.BE/M.Tech in Electronics, VLSI or related engineering discipline.Good communication and collaboration skills.
Interested candidates can share their updated resume with [email protected]
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