Staff Verification Engineer

Key Skills: IP/SOC verification, System Verilog, Verilog, UVM, Perl, Python, AMBA protocols (CHI, AXI, AHB, APB, ATB)

Roles & Responsibilities:

• Collaborate closely with the RTL team in different Geography, to understand microarchitecture details
• Develop new verification environments and enhance existing verification environments, including stimulus generators, and checkers
• Verify new ARM architecture features function as specified and do not impact existing functionality
• Implement verification strategies in partnership with other verification engineers
• Contribute to continuous improvement in verification methodology based on learnings
• Mentor early-tenure verification engineers

Skills Required:

• More than 8 years of proven experience in an IP/SOC verification
• Advanced proficiency in System Verilog and Verilog, with deep knowledge of UVM Methodology.
• Experience writing verification plan and test plan.
• Experience with Testbench development using any standard verification methodology
• Experience with Perl, Python or other scripting language
• Strong interpersonal skills to collaborate with multi-functional and geographically distributed teams to accomplish tasks

Nice to Have

• Experience with AMBA protocols (CHI, AXI, AHB, APB, ATB), JTAG/SW/TAP.
• Hands-on experience with Arm CoreSight IP and debug/trace architectures.
• Experience with ARM-based designs and/or ARM System Architectures

Education: Bachelor's degree in Engineering